View HD74ALVCH16501_4656700.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HD74ALVCH16501
18-bit Universal Bus Transceivers with 3-state Outputs
REJ03D0036-0300Z (Previous ADE-205-168A(Z)) Rev.3.00 Oct.02.2003
Description
Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A bus data is stored in the latch flip flop on the low to high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high impedance state. Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA. The output enables are complementary (OEAB is active high, and OEBA is active low). Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Features
* * * * * VCC = 2.3 V to 3.6 V Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25C) High output current 24 mA (@VCC = 3.0 V) Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
Rev.3.00, Oct.02.2003, page 1 of 11
HD74ALVCH16501
Function Table *3
Inputs OEAB L H H H H H H LEAB X H H L L L L H L CLKAB X X X A X L H L H X X Z L H L H B0 *1 B0 *2 Output B
H : High level L : Low level X : Immaterial Z : High impedance : Low to high transition Notes: 1. Output level before the indicated steady state input conditions were established. 2. Output level before the indicated steady state input conditions were established, provided that CLKAB was high before LEAB went low. 3. A to B data flow is show; B to A flow is similar but uses OEBA, LEBA, and CLKBA.
Rev.3.00, Oct.02.2003, page 2 of 11
HD74ALVCH16501
Pin Arrangement
OEAB 1 LEAB 2 A1 3 GND 4 A2 5 A3 6 VCC 7 A4 8 A5 9 A6 10 GND 11 A7 12 A8 13 A9 14 A10 15 A11 16 A12 17 GND 18 A13 19 A14 20 A15 21 VCC 22 A16 23 A17 24 GND 25 A18 26 OEBA 27 LEBA 28
56 GND 55 CLKAB 54 B1 53 GND 52 B2 51 B3 50 VCC 49 B4 48 B5 47 B6 46 GND 45 B7 44 B8 43 B9 42 B10 41 B11 40 B12 39 GND 38 B13 37 B14 36 B15 35 VCC 34 B16 33 B17 32 GND 31 B18 30 CLKBA 29 GND
(Top view)
Rev.3.00, Oct.02.2003, page 3 of 11
HD74ALVCH16501
Absolute Maximum Ratings
Item Supply voltage Input voltage
*1, 2
Symbol VCC VI VO IIK IOK IO PT Tstg
Ratings -0.5 to 4.6 -0.5 to 4.6 -0.5 to VCC +0.5 -0.5 to VCC +0.5 -50 50 50 100 1 -65 to 150
Unit V V V mA mA mA W C
Conditions Except I/O ports I/O ports VI < 0 VO < 0 or VO > VCC VO = 0 to VCC TSSOP
Output voltage *1, 2 Input clamp current Output clamp current Continuous output current Maximum power dissipation *3 at Ta = 55C (in still air) Storage temperature
Notes: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. 1. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. 2. This value is limited to 4.6 V maximum. 3. The maximum package power dissipation is calculated using a junction temperature of 150C and a board trace length of 750 mils.
Recommended DC Operating Conditions
Item Supply voltage Input voltage Output voltage High level output current Symbol VCC VI VO IOH Min 2.3 0 0 -- -- -- Low level output current IOL -- -- -- Input transition rise or fall rate Operating temperature t / v Ta 0 -40 Max 3.6 VCC VCC -12 -12 -24 12 12 24 10 85 ns / V C mA Unit V V V mA VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V Conditions
Note: Unused control inputs must be held high or low to prevent them from floating.
Rev.3.00, Oct.02.2003, page 4 of 11
HD74ALVCH16501
Logic Diagram
OEAB CLKAB LEAB LEBA CLKBA OEBA A1
1 55 2 28 30 27 3
1D C1 CLK 1D C1 CLK
54
B1
To seventeen other channels
Rev.3.00, Oct.02.2003, page 5 of 11
HD74ALVCH16501
Electrical Characteristics
(Ta = -40 to 85C)
Item Input voltage Symbol VCC (V) *1 VIH VIL Output voltage VOH 2.3 to 2.7 2.7 to 3.6 2.3 to 2.7 2.7 to 3.6 2.3 2.3 2.7 3.0 3.0 VOL 2.3 2.3 2.7 3.0 Input current IIN IIN (hold) 3.6 2.3 2.3 3.0 3.0 3.6 Off state output current *2 Quiescent supply current IOZ ICC ICC 3.6 3.6 3.0 to 3.6 Min 1.7 2.0 -- -- 2.0 1.7 2.2 2.4 2.0 -- -- -- -- -- 45 -45 75 -75 -- -- -- -- Max -- -- 0.7 0.8 -- -- -- -- -- -- 0.2 0.4 0.7 0.4 0.55 5 -- -- -- -- 500 10 40 750 A A A A V IOH = -100 A IOH = -6 mA, VIH = 1.7 V IOH = -12 mA, VIH = 1.7 V IOH = -12 mA, VIH = 2.0 V IOH = -12 mA, VIH = 2.0 V IOH = -24 mA, VIH = 2.0 V IOL = 100 A IOL = 6 mA, VIL = 0.7 V IOL = 12 mA, VIL = 0.7 V IOL = 12 mA, VIL = 0.8 V IOL = 24 mA, VIL = 0.8 V VIN = VCC or GND VIN = 0.7 V VIN = 1.7 V VIN = 0.8 V VIN = 2.0 V VIN = 0 to 3.6 V VOUT = VCC or GND VIN = VCC or GND VIN = one input at (VCC-0.6) V, other inputs at VCC or GND Unit V Test Conditions
Min to Max VCC-0.2
Min to Max --
Notes: 1. For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. 2. For I/O ports, the parameter IOZ includes the input leakage current.
Rev.3.00, Oct.02.2003, page 6 of 11
HD74ALVCH16501
Switching Characteristics
(Ta = 40 to 85C)
Item Maximum clock frequency Symbol VCC (V) fmax 2.50.2 2.7 3.30.3 Propagation delay time tPLH tPHL 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 Output enable time tZH tZL 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 Output disable time tHZ tLZ 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 Input capacitance Output capacitance CIN CIN / O 3.3 3.3 Min 150 150 150 1.2 -- 1.0 1.6 -- 1.3 1.7 -- 1.4 1.1 -- 1.0 1.4 -- 1.1 2.2 -- 1.4 2.0 -- 1.3 -- -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4.0 8.0 Max -- -- -- 4.8 4.5 3.9 5.7 5.3 4.6 6.1 5.6 4.9 5.8 5.3 4.6 6.3 6.0 5.0 6.2 5.7 5.0 5.3 4.6 4.2 -- -- pF pF Control inputs A or B ports OEBA A ns OEAB B OEBA A ns OEAB B CLK A or B LE A or B ns A or B B or A Unit MHz FROM (Input) TO (Output)
Rev.3.00, Oct.02.2003, page 7 of 11
HD74ALVCH16501
* Test Circuit
See under table 500 S1 OPEN
*1
GND 500
C L = 50 pF
Load Circuit for Outputs Symbol Vcc=2.50.2 V t PLH / t PHL OPEN t su / t h / t w t ZH/ t HZ t ZL / t LZ GND 4.6 V
Vcc = 2.7 V, 3.30.3 V
OPEN GND 6.0 V
Note: 1. C L includes probe and jig capacitance.
Rev.3.00, Oct.02.2003, page 8 of 11
HD74ALVCH16501
* Waveforms - 1
tr 90 % 90 % Vref
tf VIH 10 % t PLH t PHL GND
Input 10 %
Vref
VOH Output Vref Vref VOL
* Waveforms - 2
tr 90 % VIH GND VIH
Timing Input 10 % tsu
Vref th
Data Input
Vref
Vref GND tw VIH
Input
Vref
Vref GND
Rev.3.00, Oct.02.2003, page 9 of 11
HD74ALVCH16501
* Waveforms - 3
90 % Vref
tf
tr 90 % Vref 10 % t ZL Vref t ZH t HZ Vref VOH - 0.3 V 10 % t LZ GND VOH1 VIH
Output Control
Waveform - A
VOL + 0.3 V
VOL VOH VOL1
Waveform - B
TEST VIH Vref VOH1 VOL1
Vcc=2.50.2V
Vcc=2.7V, 3.30.3V
2.3 V 1.2 V 2.3 V GND
2.7 V 1.5 V 3.0 V GND
Notes: 1. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Zo = 50 , tr 2.5 ns, tf 2.5 ns. 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement.
Rev.3.00, Oct.02.2003, page 10 of 11
HD74ALVCH16501
Package Dimensions
As of January, 2003
14.0 14.2 Max 56 29 6.10
Unit: mm
1 *0.19 0.05
0.50 0.08 M
28
1.0 8.10 0.20 0 - 8 *0.15 0.05 0.10 0.05 0.50 0.1
0.65 Max
1.20 Max
0.10
*Ni/Pd/Au plating
Package Code JEDEC JEITA Mass (reference value)
TTP-56DAV -- -- 0.23 g
Rev.3.00, Oct.02.2003, page 11 of 11
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001
http://www.renesas.com
(c) 2003. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon 1.0

▲Up To Search▲

Price & Availability of HD74ALVCH16501

	To Download HD74ALVCH16501 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .